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Elliott 503

The Elliott 503 I used was installed at Victoria University of Wellington in the central part the 7th floor of the Rankine Brown Building in 1965. The machine was built using discrete transistor technology and occupied six large grey metal cabinets, each 78" tall, 38" wide and 24" deep (2m x 1m x 0.6m) and weighing 6150 lbs (2790 kg). It was maintained by a team of full-time electrical engineers and operators. The operator's console was a desk with built-in indicators and a control typewriter.

Elliott 503 console

Elliott 503 operators console

A large engineer's monitor board covered in literally hundreds of red indicator lights that flashed on and off in banks as the machine ran usually stood alongside the control desk.

Data and programs were entered from two paper tape readers operating at 1000 characters per second. At full speed they could start or stop on one character. It was also equipped with two paper tape punches and a 1000 lpm line printer.

Its memory consisted of a ferrite core main store of 8k 39-bit words with a 3.6 uS access time and 16k of 50 uS ferrite core backing store. This was also organised as 39-bit words. The latter was used like a fast disk: during normal operations compilers and utilities were loaded from it and it could also be used as working storage, for instance when manipulating large arrays. As delivered, the machine had no non-volatile memory apart from paper tape. The core backing memory was later increased to 32 Kwords and some tape decks were added. The university built the interfaces for these and used them to store programs and data. Prior to this programs and data were read in from the paper tape readers for every run.

Main memory was split into a 75 word(!) operating system in protected memory, with the rest of the 8K words being available for programs and data. It could load several programs at once but could not multi-task: the additional programs acted as separately compiled parts of the main program.

Each word of memory could contain five 7 bit characters, two instructions or a single number. The machine contained a single 39-bit arithmetic register. There was no stack and no multiple length arithmetic: both integers and floating point numbers occupied 39 bits. An interesting feature was that it could do floating point division somewhat faster than integer division. The instruction set was idiosyncratic. Each instruction occupied 19 bits split into a 6 bit opcode and a 13 bit address, so the whole 8K of main memory was directly addressable. Putting two instructions in the word leaves one bit over: this was known as the B-digit and, if it was set, the first instruction added the content of the addressed memory to second instruction's address field. Actually, it added the value to the entire second instruction, but that's another story... There was also an op-code with the same effect as the B-digit, which was used to handle more complex address calculations and allowed address arithmetic to continue past a word boundary. These two mechanisms were the only way of doing address calculations and were also used to handle subroutine calls and returns.